For data transmission, for example, for data transmission via serial data interfaces, in many applications data is transferred without transmitting a clock signal. For example, data may be transmitted via a single line or a differential line, in order to reduce the number of necessary signal lines and to reduce power. In such applications, a data clock on a transmitter side is in many cases generated by using a digital or analog phase locked loop (PLL), which allows a generation of a desired clock signal based on a reference clock. On a receiver side, different approaches may be used. For example, in some cases a receive clock signal may also be generated using a phase locked loop which may, for example, be clocked by a local quartz oscillator (XTAL) or other device, which may sample incoming data after a phase alignment has been found. In a different approach, for example, in cases where no reference clock signal like a quartz oscillator is available at a receiver, a so-called clock and data recovery circuit is used, which extracts and generates a receive clock signal based on the incoming data stream.